1. Field of the Invention
The present invention relates to a pattern recognition apparatus which recognizes an input pattern by means of digital signal processing and, more particularly, to a pattern recognition apparatus using a multiple similarity method for recognizing an input pattern.
2. Description of the related art
A pattern recognition apparatus using a multiple similarity method is disclosed in, for example, U.S. Pat. No. 3,688,267. This apparatus will be described hereinafter.
A pattern to be recognized is assumed to be a function of x defined on region R, and is expressed by f(x). If an input pattern is a graphic pattern, region R is a two-dimensional plane, and x represents a two-dimensional position vector. Function f(x) represents the intensity, e.g., the density, of the graphic pattern at position x.
If an input pattern is a speech pattern, region R is then an orthogonal two-dimensional plane of a time axis and a frequency axis, and x represents a position vector thereon. Function f(x) represents the loudness of a speech signal at a given time and at a given frequency.
Function f(x) can be approximated by a set {f(xr)} ##EQU1## of values of f(x) at finite (e.g., M) sampling points xr (1.ltoreq.r.ltoreq.M). Multiple similarity S.sup.(K) (f) is given by following equation (1), using input pattern vector f and predetermined standard pattern vector .phi.: ##EQU2## where (f,.phi..sup.(k) n)is an inner product of input pattern vector f and standard pattern vector .phi., ##EQU3## EQU .phi..sup.(k) n=[.phi..sup.(k) nl,.phi..sup.(k) n2, . . . , .phi..sup.(k) nM].sup.T
where k is the number of categories, for example, the number of words stored in memory for the purpose of speech recognition and n=1, 2, 3, . . . , N: where N is the number of standard patterns prepared for one category, e.g., corresponding to the number of standard patterns for a given word.
Multiple similarity S.sup.(k) (f) falls within the range expressed by relation (2): EQU 0.ltoreq.S.sup.(k) (f).ltoreq.1 (2)
As the value of multiple similarity S.sup.(k) (f) is closer to 1, input pattern f can be regarded as a pattern similar to standard pattern {.phi..sup.(k) n} ##EQU4## If relation (3) is satisfied when .epsilon. is a small positive value, input pattern f and standard pattern .phi. can be considered to belong to an identical category: EQU S.sup.(k) (f)&gt;1-.epsilon. (3)
In U.S. Pat. No. 3,688,267, .parallel.f.parallel. is constant. Therefore, if the value of ##EQU5## (f,.phi..sup.(k) n).sup.2 is maximum, it can be determined that the input pattern belongs to a kth category.
A circuit for calculating ##EQU6## (f,.phi..sup.(k) n).sup.2 and for detecting a category in which ##EQU7## (f,.phi..sup.(k) n).sup.2 becomes maximum will now be described, with reference to FIG. 1.
FIG. 1 is substantially the same block diagram as the circuit shown in FIG. 2 of U.S. Pat. No. 3,688,267. Inner product generating circuits 91, shown in FIG. 1, calculate the inner products (f,.phi..sup.(k) n) of input pattern vector f and standard pattern vectors .phi.. The calculated inner products are supplied one to each of square circuits 92, where they are then squared. The squared inner products are supplied to adders 93 and are added together. The outputs from adders 93 are supplied to maximum value detector 94. Maximum value detector 94 has K output terminals 01, 02, . . . , OK, and outputs a signal from an output terminal corresponding to a category for which the sum is the maximum.
The apparatus shown in FIG. 1 has, however, a disadvantage in that it requires a large number of hardware elements, i.e., K.times.N inner product generating circuits 91, K.times.N square circuits 92, and K adders 93. Each inner product generating circuit 91 is constituted by a multiplier and an adder. Each square circuit 92 comprises a multiplier. Therefore, the conventional apparatus shown in FIG. 1 requires at least M.times.K.times.N multipliers and K.times.N+K adders. If number N of standard patterns is 10, number M of sampling points is 16, and number K of words in the vocabulary is 10, the total number of multipliers is 1,600 (M.times.K.times.N=16 10.times.10=1600), and the total number of adders is 110 (K.times.N+K=10.times.10+10=110).
In the above-mentioned U.S. Pat. No. 3,688,267, multiplier 91 comprises an analog circuit constituted by operational amplifier 95, M resistors R1 to RM, and feedback resistor RF, as shown in FIG. 2. The adder 93 is obtained by setting the resistances of resistors R1 to RM and RF to be equal to each other. Square circuit 92 comprises an analog circuit constituted by diodes D and resistors 2R and R (see FIGS. 1b and 3 in U.S. Pat. No. 3,688,267), as shown in FIG. 3. When such circuits are used, if number N of standard patterns, number M of sampling points, and number K of words in the vocabulary are respectively 10, 16, and 10, multipliers 91 and adder 93 require 110 operational amplifiers and about 1,900 resistors. Square circuits 92 require 10 resistors R and 90 diodes D.
In this manner, in the apparatus described in U.S. Pat. No. 3,688,267, since, analog circuits are used a large number of hardware elements are required. For this reason, it is difficult to integrate this apparatus on one chip.
Another disadvantage of the apparatus disclosed in U.S. Pat. No. 3,688,267 is difficulty in circuit adjustments of the analog circuits. For example, resistances must be set to yield RF/Rr=.phi..sup.(k) n(r=1, 2, . . . , M). It is difficult to accurately set resistances. In the case of analog circuits, there are many factors to be considered and adjusted such as variations in characteristics, offsets, noise margin, and the like. Therefore, the conventional apparatus is not suitable for integration.
In the apparatus disclosed in U.S. Pat. No. 3,688,267, each standard pattern .phi..sup.(k) n is set by resistors R1 to RM. When standard patterns are modified, the resistances of 100(=10.times.10) resistors must be changed. This means poor applicability of the apparatus to objects to be pattern-recognized. Therefore, the conventional apparatus cannot be used in applications in which the vocabulary to be recognized is changed like in speech recognition, resulting in no compatibility.